The present invention relates to a digital device for synchronizing and decoding phase coded signals.
There are known synchronizing digital devices called phase locked loop devices (PLL), which comprise an oscillator having a frequency multiple with respect to the frequency of the information signal being decoded. The oscillator controls a counter, the output of which indicates the end of the bit period of the information, which controls the synchronization of the received signals. This device requires additional circuitry for decoding these signals.